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I got to try the RISC-V board of my friend Hirosh. It includes an open-source Linux-capable RISC-V CPU with MMU!
What's special about it is that this SoC has been taped out on the open-source GF180MCU process using wafer.space 🚀
Since we're in different countries, I'm connected to his board via Telnet and can issue commands to my heart's content.
More to come ⬇️
To make it possible for me to access his board, the connection chain is as follows:
LAN<-ser2net->SBC<-usb->ch340<-UART->ASIC
This is his setup in his home:
The KianV SoC includes the following peripherals:
- 1x UART
- 1x GPIO (literally a single GPIO)
- 2x SPI interfaces
- SD card reader
- Ethernet adapter
- 1x NOR flash controller
- 1x SDRAM controller (32 MiB of external memory)
This uses up all the pins available of wafer.space's CoB (Chip on Board) packaging service.
We can also run some more interesting programs, such as Micropython and some raytracers (though these do take their time), and we have access to the internet!
Please ignore the off-by-one pixels on the right side ;)
Seeing this is just incredible: Not only did Hirosh design his own open-source RISC-V CPU with MMU, he also taped it out on an open-source process using open-source EDA tools. Open source all the way!
If you'd like to know more, check out Hirosh's blog post about the KianV wafer.space tapeout at: https://wafer.space/news/kianv-riscv-soc
You can also follow him as he works on his latest pipelined RISC-V CPU implementation: @logicdestroyer.bsky.social
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