@jpm https://www.ti.com/lit/ug/tidu993/tidu993.pdf
it's a thing.
eta: actually, i'm not sure this is quite the reference design paper I had in mind, they likely had a series of them, and there were chips that managed the bias as well.
Discussion
Loading...
@jpm hrm i have a punch of supercap power harvesting boards sitting idle
@jpm https://www.ti.com/lit/ug/tidu993/tidu993.pdf
it's a thing.
eta: actually, i'm not sure this is quite the reference design paper I had in mind, they likely had a series of them, and there were chips that managed the bias as well.
@uep I meant an entirely unmodified bus that wasn’t supplying a known DC bias that you could tap into. Bus idle would be a problem because transmitters go Hi-Z. On the other hand, maybe you could use the common line’s voltage and termination/pull resistors?